发明公开
EP0739033A2 Method for forming a buried strap by controlled recrystallisation, in a semiconductor memory device, and semiconductor memory device thereby formed
失效
一种用于生产通过受控再结晶在由此制造的半导体存储器件和半导体存储器件的掩埋连接处理
- 专利标题: Method for forming a buried strap by controlled recrystallisation, in a semiconductor memory device, and semiconductor memory device thereby formed
- 专利标题(中): 一种用于生产通过受控再结晶在由此制造的半导体存储器件和半导体存储器件的掩埋连接处理
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申请号: EP96105064.8申请日: 1996-03-29
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公开(公告)号: EP0739033A2公开(公告)日: 1996-10-23
- 发明人: Hammerl, Erwin , Mandelman, Jack A. , Ho, Herbert L. , Shiozawa, Junichi , Stengl, Reinhard Johannes
- 申请人: INTERNATIONAL BUSINESS MACHINES CORPORATION , SIEMENS AKTIENGESELLSCHAFT , KABUSHIKI KAISHA TOSHIBA
- 申请人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION,SIEMENS AKTIENGESELLSCHAFT,KABUSHIKI KAISHA TOSHIBA
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION,SIEMENS AKTIENGESELLSCHAFT,KABUSHIKI KAISHA TOSHIBA
- 当前专利权人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 代理机构: Zangs, Rainer E., Dipl.-Ing.
- 优先权: US412442 19950329
- 主分类号: H01L21/8242
- IPC分类号: H01L21/8242 ; H01L27/108 ; H01L21/74 ; H01L21/225
摘要:
A method of forming a coupled capacitor and transistor is provided. A trench is formed in a semiconductor substrate (10) and an impurity-doped first conductive region (105) is then formed by filing the trench with an impurity-doped first conductive material. The impurity-doped first conductive region (105) is etched back to a first level within the trench. An insulating layer (106) is then formed on a sidewall of the portion of the trench (103) opened by the etching back of the impurity-doped first conductive region and a second conductive region (107) is formed by filing the remainder of the trench with a second conductive material. The insulating layer (106) and the second conductive region (107) are etched back to a second level within the trench and an amorphous silicon layer (108) is formed in the portion of the trench opened by the etching back of the insulating layer (106) and the second conductive region (107). The undoped amorphous silicon layer (108) is etched back to a third level within the trench. The undoped amorphous silicon layer (108) is then recrystallized. Impurities are outdiffused from the impurity-doped first conductive region to the semiconductor substrate through the recrystallized silicon layer. A source/drain region of the transistor is formed adjacent to an intersection of the trench and the surface of the semiconductor substrate. The outdiffused impurities and the recrystallized silicon layer constitute a buried strap (126) for electrically connecting the first and second conductive layers in the trench to the source/drain region.
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