An analog arithmetic unit furnished with an input capacitor, an amplifier, a floating gate MOS. An input voltage is given to the amplifier through the input capacitor. The amplifier is composed of a CMOS inverter or the like and has a floating gate in a node at its input end. The floating gate MOS controls an amount of charges in the above node by injecting the hot electrons or absorbing the charges through the tunnel effect. Accordingly, it has become possible to maintain an amount of charges at the above node at a constant level over a long period. Thus, a frequency at which an offset voltage caused by charges accumulated at the above floating gate and causing an operation error can be reduced, thereby increasing an overall arithmetic operation.