A concrete circuit configuration is proposed of a multiplex transmitter for loading a standard ATM cell with multiplexed micro-frames which are each shorter than the standard ATM cell. The input micro-frames are delivered to a distributor (504) in the input order through an interface (503). The distributor (504) distributes the input micro-frames using distributing information input. The distributing information accords with the service condition of each connection or micro-frame. An extracting circuit (506) selects buffers in accordance with predetermined buffer selection logic. A cell cancellation monitor circuit (508) relinquishes micro-frames exceeding cell tolerable time periods T2-1 - T2-m. A multiplexing processor (507) transfers the cell or a idle cell to a sender (511) in accordance with the cell transfer timing of the sender (511).