An information processor provided with a first device (31) to which electric power is supplied and a second device (32) to which electric power is supplied from the first device (31) when the device (32) is mounted on the device (31). The information processor is also provided with detecting sections (121-1, 121-n, 221-1, and 221-n) which detect the mounting and demounting of the second device (32) on and from the first device (31) and supplying sections (121-2 and 221-2) which supply electric power to the second device (32). The first device (31) incorporates a control section (151) which controls the power supply to the second device (32) from the supplying sections (121-2 and 221-2) correspondingly to the detected results of the detecting sections (121-1, 121-n, 221-1, and 221-n). Since the power supply to the second device (32) from the supplying sections (121-2 and 221-2) is controlled corresponding to the detected results of the detecting sections (121-1, 121-n, 221-1, and 221-n), the application of electrical shocks to the internal circuit of the second device (32) can be prevented when the device (32) is mounted on and demounted from the first device (31).