发明公开
EP1285464A2 SILICON CARBIDE METAL-SEMICONDUCTOR FIELD EFFECT TRANSISTORS AND METHODS OF FABRICATING SILICON CARBIDE METAL-SEMICONDUCTOR FIELD EFFECT TRANSISTORS
审中-公开
金属硅半导体场效应晶体管和方法的这种晶体管HERSTTELLUNG
- 专利标题： SILICON CARBIDE METAL-SEMICONDUCTOR FIELD EFFECT TRANSISTORS AND METHODS OF FABRICATING SILICON CARBIDE METAL-SEMICONDUCTOR FIELD EFFECT TRANSISTORS
- 专利标题（中）： 金属硅半导体场效应晶体管和方法的这种晶体管HERSTTELLUNG
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申请号： EP01910781.2申请日： 2001-02-15
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公开(公告)号： EP1285464A2公开(公告)日： 2003-02-26
- 发明人: ALLEN, Scott, T. , PALMOUR, John, W. , ALCORN, Terrence, S.
- 申请人： CREE, INC.
- 申请人地址： 4600 Silicon Drive Durham, NC 27703 US
- 专利权人： CREE, INC.
- 当前专利权人： CREE, INC.
- 当前专利权人地址： 4600 Silicon Drive Durham, NC 27703 US
- 代理机构： Warren, Keith Stanley
- 优先权： US567717 20000510
- 国际公布： WO01086727 20011115
- 主分类号： H01L29/24
- IPC分类号： H01L29/24
摘要：
SiC MESFETs are disclosed which utilize a semi-insulating SiC substrate which substantially free of deep-level dopants. Utilization of the semi-insulating substrate may reduce back-gating effects in the MESFETs. Also provided are SiC MESFETs with a two recess gate structure. MESFETS with a selectively doped p-type buffer layer are also provided. Utilization of such a buffer layer may reduce output conductance by a factor of 3 and produce a 3db increase in power gain over SiC MESFETs with conventional p-type buffer layers. A ground contact may also be provided to the p-type buffer layer and the p-type buffer layer may be made of two p-type layers with the layer formed on the substrate having a higher dopant concentration. SiC MESFETs according to embodiments of the present invention may also utilize chromium as a Schottky gate material. Furthermore, an oxide-nitride-oxide (ONO) passivation layer may be utilized to reduce surface effects in SiC MESFETs. Also, source and drain ohmic contacts may be formed directly on the n-type channel layer, thus, the n+ regions need not be fabricated and the steps associated with such fabrication may be eliminated from the fabrication process. Methods of fabricating such SiC MESFETs and gate structures for SiC FETs as well as passivation layers are also disclosed.
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