In a data conversion device (HDD, IPU1), a plurality of series of data to be converted is input from a buffer memory device (32) to a data processor (33). The data processor (33) processes a plurality of the series of the data to be converted, simultaneously in parallel, and outputs a plurality of the series of the data to be converted, simultaneously in parallel. A memory controller (MEC) of the buffer memory device (32) relates a plurality of the series of the data to be converted to respective conversion tables formed therein by the data processor (33) so as to read converted data corresponding to the series of the data to be converted from the respective conversion tables simultaneously in parallel.