发明公开
EP1396105A2 MULTIPLE LOW-SPEED INTO SINGLE HIGH-SPEED SDH/SONET CHANNEL MAPPER / FRAMER DEVICE AND METHOD
有权
分析方法与VORICHTUNGEINFÜNGER/成帧器多通道低的速度在一个单一的高速SDH / SONET通道
- 专利标题: MULTIPLE LOW-SPEED INTO SINGLE HIGH-SPEED SDH/SONET CHANNEL MAPPER / FRAMER DEVICE AND METHOD
- 专利标题(中): 分析方法与VORICHTUNGEINFÜNGER/成帧器多通道低的速度在一个单一的高速SDH / SONET通道
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申请号: EP02735164.2申请日: 2002-03-22
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公开(公告)号: EP1396105A2公开(公告)日: 2004-03-10
- 发明人: CLAUBERG, Rolf
- 申请人: International Business Machines Corporation , IBM DEUTSCHLAND GMBH
- 申请人地址: New Orchard Road Armonk, NY 10504 US
- 专利权人: International Business Machines Corporation,IBM DEUTSCHLAND GMBH
- 当前专利权人: International Business Machines Corporation,IBM DEUTSCHLAND GMBH
- 当前专利权人地址: New Orchard Road Armonk, NY 10504 US
- 代理机构: Duscher, Reinhard, Dr.
- 优先权: EP01110294 20010426
- 国际公布: WO2002089374 20021107
- 主分类号: H04J3/16
- IPC分类号: H04J3/16
摘要:
According to the present invention a method and a device is provided for combining at least two data signals having a first data rate into a single data stream having a second data rate being higher than the first data rate for transmission on a shared medium or vice versa, said device comprises at least one port for receiving said at least two data signals and a port addressing unit for extracting data from the data signals received by said ports, wherein said port addressing unit is configured to place the extracted data at predetermined positions in said single data stream to be transmitted on said shared medium and at least one control data insertion unit is provided for placing control data in said single data stream. Thus, a method and device proposed implementing a multiplexing structure in which the data from M parallel low-speed channels are multiplexed onto a data bus operating with M times the data rate of the M low-speed channels. A multiple-stage process where, e.g., 28 T-1 (DS-1) channels are re-mapped into one T-3 (DS-3) channel and 3 T-3 (DS-3) channels are then mapped into an STM-1 frame is advantageously avoided.
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