发明公开
EP1455473A2 Clock Synchronisation over a Packet Network
有权
Taktsynchronisierungübereinem Paketnetzwerk
- 专利标题： Clock Synchronisation over a Packet Network
- 专利标题（中）： Taktsynchronisierungübereinem Paketnetzwerk
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申请号： EP04270001.3申请日： 2004-03-01
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公开(公告)号： EP1455473A2公开(公告)日： 2004-09-08
- 发明人: Scott, Martin, Raymond , Frost, Timothy, Michael, Edmund , Floyd, Geoffrey, Edward , Crowle, Martin
- 申请人： Zarlink Semiconductor Limited
- 申请人地址： Cheney Manor Swindon, Wiltshire SN2 2QW GB
- 专利权人： Zarlink Semiconductor Limited
- 当前专利权人： Zarlink Semiconductor Limited
- 当前专利权人地址： Cheney Manor Swindon, Wiltshire SN2 2QW GB
- 代理机构： Lind, Robert
- 优先权： GB0305245 20030307
- 主分类号： H04J3/06
- IPC分类号： H04J3/06 ; H04L12/64
摘要：
A method of synchronising first and second clocks coupled respectively to ingress and egress interfaces 6,7 of a packet network 1, the method comprising calculating a minimum packet Transit Time over the network 1 in each of successive time intervals, and varying the frequency of the second clock so as to track variations in the minimum packet Transit Time.
公开/授权文献
- EP1455473B1 Clock Synchronisation over a Packet Network 公开/授权日：2008-04-30
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