发明公开
EP1573529A2 METHOD AND APPARATUS FOR ENCODING DESIGN DESCRIPTION IN RECONFIGURABLE MULTI-PROCESSOR SYSTEM
审中-公开
方法和装置在多重构处理器的系统编码设计规范
- 专利标题: METHOD AND APPARATUS FOR ENCODING DESIGN DESCRIPTION IN RECONFIGURABLE MULTI-PROCESSOR SYSTEM
- 专利标题(中): 方法和装置在多重构处理器的系统编码设计规范
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申请号: EP03812646.2申请日: 2003-12-08
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公开(公告)号: EP1573529A2公开(公告)日: 2005-09-14
- 发明人: VAIDYANATHAN, Krishnamurthy , BURNS, Geoffrey, Francis
- 申请人: Koninklijke Philips Electronics N.V.
- 申请人地址: Groenewoudseweg 1 5621 BA Eindhoven NL
- 专利权人: Koninklijke Philips Electronics N.V.
- 当前专利权人: Koninklijke Philips Electronics N.V.
- 当前专利权人地址: Groenewoudseweg 1 5621 BA Eindhoven NL
- 代理机构: Gravendeel, Cornelis
- 优先权: US432537P 20021211
- 国际公布: WO2004053712 20040624
- 主分类号: G06F9/445
- IPC分类号: G06F9/445
摘要:
A method (400) and apparatus (100) are disclosed for storing the software specifications (320) for each processor (110) in a multi-processor system (100). The disclosed storage technique reduces the total memory space that is required to store the configuration information for each processor (110) and does not require a linear scaling of the memory size when the number of processors increases. Each unique software specification (320) is stored in memory and a pointer (310) is stored for each processor (110) that identifies the corresponding location in memory (140') of the configuration information for the processor (110). The size of the memory area that stores the pointers (310) for each processor (110) still has a linear relationship with the number of processors (110). The size of the memory area (140') that stores the unique software specifications (320) is independent of the number of processors (110).
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