Methods and apparatus of the present invention can be used to implement a communications system wherein different devices using the same LDPC code can be implemented using different levels of parallelism. The use of a novel class of LDPC codes makes such differences in parallelism possible. Use of a factorable permuter (706) in various embodiments of the invention make LDPC devices with different levels of parallelism in the encoder and decoder relatively easy to implement when using codes in the class of LDPC codes discussed herein. The factorable permuter (706) may be implemented as a controllable multi-stage switching device which performs none, one, or multiple sequential reordering operations on a Z element vector passed between memory (702) and a Z element vector processor (710), with the switching of individual vectors being controlled (718) in accordance with the graph structure (720) of the code being implemented.