Method for producing a field effect transistor comprising a source region (9), a drain region and a channel layer (11) interconnecting the source and drain region. The method includes the step of providing a sacrificial layer (4) on part of a semiconductor material (1) whose edge is used to define the edge of an implant, such as the source region (9), in the semiconductor material (1), where the edge (4c) of the sacrificial layer (4) is subsequently used to define the edge of a gate (16).