A plasma display panel having an enhanced arrangement of pixels and electrodes enabling higher integration of pixels. A front substrate and a rear substrate are formed having opposing surfaces and a plurality of discharge cells are partitioned in a space therebetween. A plurality of address electrodes (Am,Am+1,...,Am+7) are formed along a first direction between the front and rear substrates. A plurality of display electrodes (Xn,Xn+1,Xn+2,Yn,Yn+1,Yn+2) are formed along a second direction between the front and rear substrates and are electrically separated from the plurality of address electrodes (Am,Am+1,...,Am+7). At least two discharge cells among a plurality of discharge cells (320R,320G,320B) included in respective pixels (320) correspond to and are driven by a same address electrode.