发明公开
EP1810411A2 A RECEIVER ARCHITECTURE WITH DIGITALLY GENERATED INTERMEDIATE FREQUENCY
审中-公开
接收器架构,内置数字GENERATED之间的频率
- 专利标题: A RECEIVER ARCHITECTURE WITH DIGITALLY GENERATED INTERMEDIATE FREQUENCY
- 专利标题(中): 接收器架构,内置数字GENERATED之间的频率
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申请号: EP05810558.6申请日: 2005-10-12
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公开(公告)号: EP1810411A2公开(公告)日: 2007-07-25
- 发明人: SEENDRIPU, Kishore , MONTEMAYOR, Raymond , YE, Sheng , CHANG, Glenn , LING, Curtis
- 申请人: Maxlinear, Inc.
- 申请人地址: 2036 Corte Del Nogal, 200 Carlsbad, CA 92008 US
- 专利权人: Maxlinear, Inc.
- 当前专利权人: Maxlinear, Inc.
- 当前专利权人地址: 2036 Corte Del Nogal, 200 Carlsbad, CA 92008 US
- 代理机构: Price, Nigel John King
- 优先权: US618240P 20041012
- 国际公布: WO2006044372 20060427
- 主分类号: H04B1/30
- IPC分类号: H04B1/30
摘要:
A receiver can be configured to include an RF front end that is configured to downconvert a received signal to a baseband signal or a low Intermediate Frequency (IF) signal. The receiver can downconvert the desired signal from an RF frequency in the presence of numerous interference sources to a baseband or low IF signal for filtering and channel selection. The filtered baseband or low IF signal can be converted to a digital representation. The digital representation of the signal can be upconverted in the digital domain to a programmable IF frequency. The digital IF signal can be converted to an analog IF signal that can be processed by legacy hardware.
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