发明公开
EP1828950A2 TECHNIQUES FOR FILTERING ATTEMPTS TO ACCESS COMPONENT CORE LOGIC 审中-公开
方法过滤访问企图组件的核心逻辑

  • 专利标题: TECHNIQUES FOR FILTERING ATTEMPTS TO ACCESS COMPONENT CORE LOGIC
  • 专利标题(中): 方法过滤访问企图组件的核心逻辑
  • 申请号: EP05855179.7
    申请日: 2005-12-15
  • 公开(公告)号: EP1828950A2
    公开(公告)日: 2007-09-05
  • 发明人: MAOR, Moshe
  • 申请人: Intel Corporation
  • 申请人地址: 2200 Mission College Boulevard Santa Clara, CA 95052 US
  • 专利权人: Intel Corporation
  • 当前专利权人: Intel Corporation
  • 当前专利权人地址: 2200 Mission College Boulevard Santa Clara, CA 95052 US
  • 代理机构: Beresford, Keith Denis Lewis
  • 优先权: US15872 20041216
  • 国际公布: WO2006066277 20060622
  • 主分类号: G06F21/02
  • IPC分类号: G06F21/02 G06F21/00 G06F21/04 H04L29/06
TECHNIQUES FOR FILTERING ATTEMPTS TO ACCESS COMPONENT CORE LOGIC
摘要:
Techniques to limit accesses to hardware component devices by external devices or external software programs. A filter device may be used to filter requests to access core logic of a hardware component device based on access rules. Access rules can limit access to the core logic based on phases of the hardware component device, the requested operation of the core logic, or the target area in the core logic.
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