Invention Publication
EP1913608A1 MULTI LAYER CHIP CAPACITOR, AND METHOD AND APPARATUS FOR MANUFACTURING THE SAME
审中-公开
多层CHIPKOMPENSATOR和方法及装置及其制造
- Patent Title: MULTI LAYER CHIP CAPACITOR, AND METHOD AND APPARATUS FOR MANUFACTURING THE SAME
- Patent Title (中): 多层CHIPKOMPENSATOR和方法及装置及其制造
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Application No.: EP06768973.7Application Date: 2006-06-21
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Publication No.: EP1913608A1Publication Date: 2008-04-23
- Inventor: HA, Jae-Ho
- Applicant: SEHYANG INDUSTRIAL CO.,LTD.
- Applicant Address: 9-2, Horim-dong, Dalseo-gu 704-240 Daegu KR
- Assignee: SEHYANG INDUSTRIAL CO.,LTD.
- Current Assignee: SEHYANG INDUSTRIAL CO.,LTD.
- Current Assignee Address: 9-2, Horim-dong, Dalseo-gu 704-240 Daegu KR
- Agency: Grünecker, Kinkeldey, Stockmair & Schwanhäusser Anwaltssozietät
- Priority: KR20050053559 20050621; KR20060055074 20060619
- International Announcement: WO2006137689 20061228
- Main IPC: H01G4/228
- IPC: H01G4/228
Abstract:
The present invention carries out the vacuum deposition by setting a deposition angle between a single mask set including a shadow mask having a plurality of slits and a deposition source to form a lower terminal layer, a dielectric layer, an inner electrode layer, and an upper terminal layer at once under a vacuum state generated once, or adjusts slit patterns by relatively moving upper and lower mask sets that respectively include shadow masks having a plurality of slits and face each other to form a lower terminal layer, a dielectric layer, an inner electrode layer, and an upper terminal layer at once under a vacuum state generated once.
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