An encoder (100) for generating an output codeword based on an input information word, the input information word having fewer bits than the output codeword. The encoder (100) comprising a segmenter (110) for segmenting the input information word into a plurality of coded segments, the segments having bits and comprising a zigzag encoder core (120) for calculating a redundancy bit for a current segment, wherein a redundancy bit of an earlier segment in the order is used for calculating the redundancy bit for the current segment. The encoder (100) further comprising an interleaver (130) for interleaving the bits of the plurality of segments using a first interleaving rule to obtain a first interleaved version and for interleaving the bits of the plurality of segments using a second interleaving rule to obtain a second interleaved version, where the interleaver (130) is designed to generate the first interleaving rule as a predefined interleaving rule obtained by conducting a predefined number of sequenced intermediate sub-steps. The encoder (100) further comprising an output codeword constructor (140) for constructing the output codeword using the input codeword or an interleaved version thereof, a set of first redundancy bits generated by the zigzag encoder core (120) fed by the input codeword or the first interleaved version and a set of second redundancy bits generated by the zigzag encoder core (120) fed by the second interleaved version, wherein the interleaver (130) is adapted to use, as the second interleaving rule, an intermediate interleaving rule obtained by conducting a first sub-step or a number of sub-steps less than the predefined number of sub-steps or an interleaving rule obtained by processing the intermediate interleaving rule in a different manner compared to the remaining sub-steps.