发明公开
EP1956737A1 Device for generating counter signals representative of clock signals and device for reconstructing clock signals, for a packet-switched network
有权
一种用于时钟信号为用于分组的时钟信号的恢复的显示和装置产生计数器信号设备交换网络
- 专利标题： Device for generating counter signals representative of clock signals and device for reconstructing clock signals, for a packet-switched network
- 专利标题（中）： 一种用于时钟信号为用于分组的时钟信号的恢复的显示和装置产生计数器信号设备交换网络
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申请号： EP08101268.4申请日： 2008-02-04
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公开(公告)号： EP1956737A1公开(公告)日： 2008-08-13
- 发明人: TAPIE, THIERRY , DEFRANCE, SERGE , MONTALVO, LUIS
- 申请人： Thomson Licensing
- 申请人地址： 46, Quai A. Le Gallo 92100 Boulogne-Billancourt FR
- 专利权人： Thomson Licensing
- 当前专利权人： Thomson Licensing
- 当前专利权人地址： 46, Quai A. Le Gallo 92100 Boulogne-Billancourt FR
- 代理机构： Berthier, Karine
- 优先权： FR0753082 20070206
- 主分类号： H04J3/06
- IPC分类号： H04J3/06 ; H03L7/093 ; H03L7/107 ; H04N7/62
摘要：
A device (D2) is dedicated to the reconstruction of clock signals, for example within communication equipment (EQ2) of an IP network. This device (D2) comprises i) a phase-locked loop (BV) having a cut-off frequency dependent, on the one hand, on a configuration value making it possible to reconstruct clock signals according to a chosen clock frequency, and on the other hand, a chosen sampling frequency, and ii) control means (MC2) responsible for forcing the phase-locked loop (BV) to present a variable cut-off frequency according to a received operating mode indication.
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