发明公开
EP2120343A2 Dithering control of oscillator frequency to reduce cumulative timing error in a clock
有权
Dithering-Steuerung einer Oszillatorfrequenz zur Verringerung kumulativer Taktfehler bei einem Taktgeber
- 专利标题： Dithering control of oscillator frequency to reduce cumulative timing error in a clock
- 专利标题（中）： Dithering-Steuerung einer Oszillatorfrequenz zur Verringerung kumulativer Taktfehler bei einem Taktgeber
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申请号： EP09157599.3申请日： 2009-04-08
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公开(公告)号： EP2120343A2公开(公告)日： 2009-11-18
- 发明人: Scott, Gary Lee , Dryer, Joseph Ernest
- 申请人： PGS Onshore, Inc.
- 申请人地址： 15150 Memorial Drive Houston, TX 77079 US
- 专利权人： PGS Onshore, Inc.
- 当前专利权人： PGS Onshore, Inc.
- 当前专利权人地址： 15150 Memorial Drive Houston, TX 77079 US
- 代理机构： Lord, Michael
- 优先权： US82788 20080414
- 主分类号： H03L7/093
- IPC分类号： H03L7/093 ; H03L7/099 ; G04G3/00
摘要：
A method for correcting time error in an oscillator operated clock according to one aspect of the invention includes at selected times determining at least one of a time error in the clock and a frequency difference between the oscillator and a reference oscillator by detecting a time reference signal. A change in the at least one of the time error and the frequency difference between a first one and a second one of the detecting the time reference signals is determined. A frequency of the oscillator is adjusted so as to substantially cancel a cumulative time error between the second one of the detecting the time reference signal and a selected detecting the time reference signal.
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