发明公开
EP2193545A2 VERTICAL DIODE BASED MEMORY CELLS HAVING A LOWERED PROGRAMMING VOLTAGE AND METHODS OF FORMING THE SAME
审中-公开
与用于生产羞辱编程电压和工艺垂直二极管基于内存CELL
- 专利标题： VERTICAL DIODE BASED MEMORY CELLS HAVING A LOWERED PROGRAMMING VOLTAGE AND METHODS OF FORMING THE SAME
- 专利标题（中）： 与用于生产羞辱编程电压和工艺垂直二极管基于内存CELL
-
申请号： EP08836291.8申请日： 2008-09-26
-
公开(公告)号： EP2193545A2公开(公告)日： 2010-06-09
- 发明人: HERNER, S., Brad , KUMAR, Tanmay
- 申请人： Sandisk 3D LLC
- 申请人地址： 601 McCarthy Boulevard Milpitas, CA 95035 US
- 专利权人： Sandisk 3D LLC
- 当前专利权人： Sandisk 3D LLC
- 当前专利权人地址： 601 McCarthy Boulevard Milpitas, CA 95035 US
- 代理机构： Hitchcock, Esmond Antony
- 优先权： US864848 20070928
- 国际公布： WO2009045920 20090409
- 主分类号： H01L27/115
- IPC分类号： H01L27/115
摘要：
In a first aspect, a method for forming a non-volatile memory cell is provided. The method includes (1) forming a metal-insulator-metal (MIM) antifuse stack including (a) a first metal layer; (b) a silicon dioxide, oxynitride or silicon nitride antifuse layer formed above the first metal layer; and (c) a second metal layer formed above the antifuse layer. The method also includes (2) forming a contiguous p-i-n diode above the MIM stack, the contiguous p-i-n diode comprising deposited semiconductor material; (3) forming a layer of a suicide, silicide-germanide, or germanide in contact with the deposited semiconductor material; and (4) crystallizing the deposited semiconductor material in contact with the layer of suicide, silicide- germanide, or germanide. The memory cell comprises the contiguous p-i-n diode and the MIM stack. Other aspects are provided.
信息查询
IPC分类:
