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发明公开
EP2202797A2 Memory cell array comprising nanogap memory elements 有权
包含纳米间隙存储器元件的存储器单元阵列

Memory cell array comprising nanogap memory elements
摘要：
Disclosed is a memory cell array (10) including word lines (WL), first bit lines (BL1) and second bit lines (BL2) respectively connected to memory cells (100), wherein each memory cell (100) includes a MOS transistor (110) and a nanogap element (120) having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the first bit line to connect it to a sense amplifier (51), specifying the word line and supplying a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the word line voltage becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.
摘要（中）：

公开了包括分别连接到存储单元（100）的字线（WL），第一位线（BL1）和第二位线（BL2）的存储单元阵列（10），其中每个存储单元（100）包括MOS晶体管 110）和纳米间隙元件（120），所述纳米间隙元件（120）具有第一导电层和第二导电层以及通过施加预定电压而电阻值改变的间隙，并且通过指定第一位线来写入数据以将其连接到地， 并向第二位线提供写入电压，并且通过指定第一位线来读取它以将其连接到读出放大器（51），指定字线并将低于写入电压的读取电压提供给第二位线 并且当字线电压变为栅极阈值电压或更大以及驱动电压和栅极阈值电压之和或更小时指定字线。

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