发明公开
EP2343698A2 Display apparatus with automatic quantization clock phase adjustment
审中-公开
与Quantisierungstaktphase的自动调整显示装置
- 专利标题: Display apparatus with automatic quantization clock phase adjustment
- 专利标题(中): 与Quantisierungstaktphase的自动调整显示装置
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申请号: EP11150154.0申请日: 2011-01-05
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公开(公告)号: EP2343698A2公开(公告)日: 2011-07-13
- 发明人: Funada, Masahiro
- 申请人: Canon Kabushiki Kaisha
- 申请人地址: 30-2 Shimomaruko 3-chome Ohta-ku Tokyo 146-8501 JP
- 专利权人: Canon Kabushiki Kaisha
- 当前专利权人: Canon Kabushiki Kaisha
- 当前专利权人地址: 30-2 Shimomaruko 3-chome Ohta-ku Tokyo 146-8501 JP
- 代理机构: Derham, Cassandra Virginie
- 优先权: JP2010001508 20100106
- 主分类号: G09G5/00
- IPC分类号: G09G5/00 ; G09G5/18
摘要:
The display apparatus includes an AD converter (6) converting an analog video signal into a digital video signal, a phase adjuster (1) and a horizontal start position detector (7). The detector detects a horizontal start position where an output value of the AD converter becomes a minimum value that exceeds a threshold level in a video horizontal direction. The phase adjuster acquires a start position change phase where the horizontal start position is changed. The phase adjuster calculates a first phase period where the analog video signal starts its transition from a first level to a second (higher) level and then ends the transition. The phase adjuster sets a phase not included in the first phase period as an adjusted phase of the quantization clock.
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