发明公开
- 专利标题: ENCRYPTING APPARATUS
- 专利标题(中): VERSCHLÜSSELUNGSVORRICHTUNG
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申请号: EP08877255.3申请日: 2008-10-07
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公开(公告)号: EP2348499A1公开(公告)日: 2011-07-27
- 发明人: YAMAMOTO, Dai , ITOH, Kouichi , ISOBE, Masayoshi , OKADA, Souichi
- 申请人: Fujitsu Limited , Fujitsu Semiconductor Limited
- 申请人地址: 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi, Kanagawa 211-8588 JP
- 专利权人: Fujitsu Limited,Fujitsu Semiconductor Limited
- 当前专利权人: Fujitsu Limited,Fujitsu Semiconductor Limited
- 当前专利权人地址: 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi, Kanagawa 211-8588 JP
- 代理机构: Holz, Ulrike
- 国际公布: WO2010041307 20100415
- 主分类号: G09C1/00
- IPC分类号: G09C1/00
摘要:
An encrypting apparatus includes a digest part using a SHA-2 algorithm of which a basic unit of operation is 32*Y (Y=1 or 2) bits. The digest part includes a shift register including a series of registers, and a predetermined number of adders performing an addition operation based on data stored in the shift register. The shift register includes a (32*Y)/X-bit register, where X=2 k (k is an integer such that 1≤k≤4 when Y=1 and 1≤k≤5 when Y=2). Each of the adders has a data width of (32*Y)/X bits and performs the addition operation in each cycle in which the data stored in the shift register is shifted between the registers with the data width of (32*Y)/X bits.
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