发明公开
EP2548226A1 MULTI-CHIP PACKAGE WITH OFFSET DIE STACKING AND METHOD OF MAKING SAME
审中-公开
具有偏移模块堆叠的多芯片封装及其制造方法
- 专利标题: MULTI-CHIP PACKAGE WITH OFFSET DIE STACKING AND METHOD OF MAKING SAME
- 专利标题(中): 具有偏移模块堆叠的多芯片封装及其制造方法
-
申请号: EP11755583.9申请日: 2011-03-08
-
公开(公告)号: EP2548226A1公开(公告)日: 2013-01-23
- 发明人: GILLINGHAM, Peter
- 申请人: MOSAID Technologies Incorporated
- 申请人地址: 11 Hines Road, Suite 203 Ottawa, ON K2K 2X1 CA
- 专利权人: MOSAID Technologies Incorporated
- 当前专利权人: MOSAID Technologies Incorporated
- 当前专利权人地址: 11 Hines Road, Suite 203 Ottawa, ON K2K 2X1 CA
- 代理机构: Lang, Johannes
- 优先权: US315111P 20100318
- 国际公布: WO2011113136 20110922
- 主分类号: H01L23/50
- IPC分类号: H01L23/50 ; H01L21/58 ; H01L27/10
摘要:
A semiconductor device has a plurality of stacked semiconductor dice mounted on a substrate. Each die has similar dimensions. Each die has a first plurality of bonding pads arranged along a bonding edge of the die. A first group of the dice are mounted to the substrate with the bonding edge oriented in a first direction. A second group of the dice are mounted to the substrate with the bonding edge oriented in a second direction opposite the first direction. Each die is laterally offset in the second direction relative to the remaining dice by a respective lateral offset distance such that the bonding pads of each die are not disposed between the substrate and any portion of the remaining dice in a direction perpendicular to the substrate. A plurality of bonding wires connects the bonding pads to the substrate. A method of manufacturing a semiconductor device is also disclosed.
信息查询
IPC分类: