发明授权
EP2726991B1 METHOD AND APPARATUS FOR MEMORY ENCRYPTION WITH INTEGRITY CHECK AND PROTECTION AGAINST REPLAY ATTACKS
有权
具有完整性检查和防止重放攻击的保护的存储器加密方法和设备
- 专利标题： METHOD AND APPARATUS FOR MEMORY ENCRYPTION WITH INTEGRITY CHECK AND PROTECTION AGAINST REPLAY ATTACKS
- 专利标题（中）： 具有完整性检查和防止重放攻击的保护的存储器加密方法和设备
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申请号： EP11868426.5申请日： 2011-06-29
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公开(公告)号： EP2726991B1公开(公告)日： 2018-03-14
- 发明人: GUERON, Shay , SAVAGAONKAR, Uday , MCKEEN, Francis X. , ROZAS, Carlos V. , DURHAM, David M. , DOWECK, Jacob , MULLA, Ofir , ANATI, Ittai , GREENFIELD, Zvika , MAOR, Moshe
- 申请人： Intel Corporation
- 申请人地址： 2200 Mission College Boulevard Santa Clara, CA 95054 US
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： 2200 Mission College Boulevard Santa Clara, CA 95054 US
- 代理机构： Goddar, Heinz J.
- 国际公布： WO2013002789 20130103
- 主分类号： G06F12/14
- IPC分类号： G06F12/14 ; G06F21/72 ; G06F21/64 ; H04L9/06 ; H04L9/32
摘要：
A method and apparatus to provide cryptographic integrity checks and replay protection to protect against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a “time stamp” indicator. A tree-based replay protection scheme uses standard XTS-AES to encrypt contents of a cache line in the system memory. A Message-Authentication Code (MAC) for the cache line is encrypted using enhanced XTS-AES and a “time stamp” indicator associated with the cache line. The “time stamp indicator” is stored in a processor.
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