Invention Publication
- Patent Title: Retention check logic for non-volatile memory
- Patent Title (中): 逻辑用于检查非易失性存储器中的电荷守恒
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Application No.: EP13174686.9Application Date: 2013-07-02
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Publication No.: EP2779175A3Publication Date: 2014-12-31
- Inventor: Hung, Chun-Hsiung , Kuo, Nai-Ping , Chang, Kuen-Long , Chen, Ken-Hui , Wang, Yu-Chen
- Applicant: MACRONIX INTERNATIONAL CO., LTD.
- Applicant Address: No.16, Li-Hsin Road, Science-Based Industrial Park Hsinchu TW
- Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee Address: No.16, Li-Hsin Road, Science-Based Industrial Park Hsinchu TW
- Agency: Krauns, Christian
- Priority: US201361780942P 20130313
- Main IPC: G11C16/34
- IPC: G11C16/34
Abstract:
An integrated circuit memory device includes an array of non-volatile, charge trapping memory cells, configured to store data values in memory cells in the array using threshold states, including a higher threshold state characterized by a minimum threshold exceeding a selected read bias. A controller includes a stand-by mode, a write mode and a read mode. Retention check logic executes on power-up, or during the stand-by mode, to identify memory cells in the higher threshold state which fail a threshold retention check. Also, logic is provided to reprogram the identified memory cells.
Public/Granted literature
- EP2779175B1 Retention check logic for non-volatile memory Public/Granted day:2018-11-28
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