发明公开
EP3069232A1 VECTOR PROCESSING ENGINE EMPLOYING FORMAT CONVERSION CIRCUITRY IN DATA FLOW PATHS BETWEEN VECTOR DATA MEMORY AND EXECUTION UNITS, AND RELATED METHOD
审中-公开
在它们之间向量资料存储和执行单元和相应的方法处理数据流格式转换电路矢量处理机
- 专利标题： VECTOR PROCESSING ENGINE EMPLOYING FORMAT CONVERSION CIRCUITRY IN DATA FLOW PATHS BETWEEN VECTOR DATA MEMORY AND EXECUTION UNITS, AND RELATED METHOD
- 专利标题（中）： 在它们之间向量资料存储和执行单元和相应的方法处理数据流格式转换电路矢量处理机
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申请号： EP14806777.0申请日： 2014-11-12
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公开(公告)号： EP3069232A1公开(公告)日： 2016-09-21
- 发明人: KHAN, Raheel
- 申请人： Qualcomm Incorporated
- 申请人地址： 5775 Morehouse Drive San Diego, CA 92121-1714 US
- 专利权人： Qualcomm Incorporated
- 当前专利权人： Qualcomm Incorporated
- 当前专利权人地址： 5775 Morehouse Drive San Diego, CA 92121-1714 US
- 代理机构： Klang, Alexander H.
- 优先权： US201314082088 20131115
- 国际公布： WO2015073526 20150521
- 主分类号： G06F9/30
- IPC分类号： G06F9/30 ; G06F9/38 ; G06F15/80
摘要：
Vector processing engines (VPEs) employing format conversion circuitry in data flow paths between vector data memory and execution units to provide in-flight format-converting of input vector data to execution units for vector processing operations are disclosed. Related vector processor systems and methods are also disclosed. Format conversion circuitry is provided in data flow paths between vector data memory and execution units in the VPE. The format conversion circuitry is configured to convert input vector data sample sets fetched from vector data memory in-flight while the input vector data sample sets are being provided over the data flow paths to the execution units to be processed. In this manner, format conversion of the input vector data sample sets does not require pre-processing, storage, and re-fetching from vector data memory, thereby reducing power consumption and not limiting efficiency of the data flow paths by format conversion pre-processing delays.
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