发明公开
EP3084815A1 SELF-ALIGNED GATE EDGE AND LOCAL INTERCONNECT AND METHOD TO FABRICATE SAME 审中-公开
自调节GATE RAND和本地连接和方法及其生产

  • 专利标题: SELF-ALIGNED GATE EDGE AND LOCAL INTERCONNECT AND METHOD TO FABRICATE SAME
  • 专利标题(中): 自调节GATE RAND和本地连接和方法及其生产
  • 申请号: EP13899890.1
    申请日: 2013-12-19
  • 公开(公告)号: EP3084815A1
    公开(公告)日: 2016-10-26
  • 发明人: WEBB, Milton ClairBOHR, MarkGHANI, TahirLIAO, Szuya S.
  • 申请人: Intel Corporation
  • 申请人地址: 2200 Mission College Boulevard MS: RNB-4-150 Santa Clara, California 95054 US
  • 专利权人: Intel Corporation
  • 当前专利权人: Intel Corporation
  • 当前专利权人地址: 2200 Mission College Boulevard MS: RNB-4-150 Santa Clara, California 95054 US
  • 代理机构: Goddar, Heinz J.
  • 国际公布: WO2015094305 20150625
  • 主分类号: H01L21/336
  • IPC分类号: H01L21/336
SELF-ALIGNED GATE EDGE AND LOCAL INTERCONNECT AND METHOD TO FABRICATE SAME
摘要:
Self-aligned gate edge and local interconnect structures and methods of fabricating self-aligned gate edge and local interconnect structures are described. In an example, a semiconductor structure includes a semiconductor fin disposed above a substrate and having a length in a first direction. A gate structure is disposed over the semiconductor fin, the gate structure having a first end opposite a second end in a second direction, orthogonal to the first direction. A pair of gate edge isolation structures is centered with the semiconductor fin. A first of the pair of gate edge isolation structures is disposed directly adjacent to the first end of the gate structure, and a second of the pair of gate edge isolation structures is disposed directly adjacent to the second end of the gate structure.
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