发明公开
EP3229276A1 INTEGRATION OF NON-VOLATILE CHARGE TRAP MEMORY DEVICES AND LOGIC CMOS DEVICES
审中-公开
非易失性电荷陷阱存储器器件和逻辑CMOS器件的集成
- 专利标题： INTEGRATION OF NON-VOLATILE CHARGE TRAP MEMORY DEVICES AND LOGIC CMOS DEVICES
- 专利标题（中）： 非易失性电荷陷阱存储器器件和逻辑CMOS器件的集成
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申请号： EP16188153.7申请日： 2013-03-18
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公开(公告)号： EP3229276A1公开(公告)日： 2017-10-11
- 发明人: RAMKUMAR, Krishnaswamy , JENNE, Fredrick , LEVY, Sagy
- 申请人： Cypress Semiconductor Corporation
- 申请人地址： 198 Champion Court San Jose, CA 95134 US
- 专利权人： Cypress Semiconductor Corporation
- 当前专利权人： Cypress Semiconductor Corporation
- 当前专利权人地址： 198 Champion Court San Jose, CA 95134 US
- 代理机构： Jones, Keith William
- 优先权： US201213436878 20120331
- 主分类号： H01L29/792
- IPC分类号： H01L29/792 ; H01L21/28 ; H01L29/66 ; H01L27/11573 ; B82Y10/00 ; H01L29/78 ; H01L29/06
摘要：
An embodiment of a method of integrating a non-volatile memory device into a logic MOS flow is described. Generally, the method includes: forming in a first region of a substrate a channel of a memory device from a semiconducting material overlying a surface of the substrate, the channel connecting a source and a drain of the memory device; forming a charge trapping dielectric stack over the channel adjacent to a plurality of surfaces of the channel, wherein the charge trapping dielectric stack includes a blocking layer on a charge trapping layer over a tunnelling layer; and form-ing a MOS device over a second region of the substrate.
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