Embodiments of the present disclosure relate to the technical field of integrated circuits, and in particular, relate to a DAC capacitor array, an analog-to-digital converter, and a method for reducing power consumption of an analog-to-digital converter. The DAC capacitor array includes a plurality of sub-capacitor arrays that are connected in parallel. Each sub-capacitor array includes: a capacitor group, including N capacitors connected in parallel, N being a positive integer; and a primary switch and a plurality of multiplexers; wherein one terminal of each capacitor in the capacitor group is connected to an input terminal of a comparator, and is connected to an input source via the primary switch; and the other terminals of the capacitors in the capacitor group are connected to a plurality of input sources via corresponding multiplexers respectively. The DAC capacitor array is optimized by adjusting the reference voltage to which the capacitors in the DAC capacitor array are connected, which reduces the overall capacitance of the DAC capacitor array. In this way, the size of the SAR analog-to-digital converter is reduced, the power consumption is reduced, and meanwhile the cost of chips may be lowered in manufacture of the chips.