Embodiments of the present invention provide a correlated double sampling integrating circuit, including: a sampling and holding module, an energy storage unit and a feedback module; where the sampling and holding module is configured to perform sampling and holding for different input signals, the energy storage unit is configured to store charges corresponding to the input signals upon the sampling and holding to generate node signals (for example, node voltages), and the feedback module is configured to form a negative feedback loop with the energy storage unit to control node signals at an integrating stage to be consistent with node signals at a resetting stage and prevent output jump of the correlated double sampling integrating circuit. Therefore, the correlated double sampling integrating circuit eliminates the noise caused by 1/f noise of the operational amplifier and noise caused by mismatch voltage, and prevents or weakens output jump of the correlated double sampling integrating circuit caused by the increase of the count of integrations.