According to an aspect of the present inventive concept there is provided a method for forming a multi-level interconnect structure for a semiconductor device, the method comprising:
forming a first interconnection level including a set of conductive lines arranged in a first common horizontal plane of the first interconnection level and extending parallel to a first direction,
forming a second interconnection level, wherein forming the second interconnection level comprises:
forming, on the first interconnection level, a first sub-level of the second interconnection level, the first sub-level including a set of conductive lines arranged in a first common horizontal plane of the second interconnection level and extending parallel to a second direction transverse to the first direction, and
forming, on the first sub-level of the second interconnection level, a second sub-level of the second interconnection level, the second sub-level including a set of conductive lines arranged in a second common horizontal plane of the second interconnection level and extending parallel to the second direction,
wherein the first and the second sub-levels of the second interconnection level are formed as consecutive sub-levels and wherein said set of lines of the first sub-level of the second interconnection level and said set of lines of the second sub-level of the second interconnection level are horizontally displaced in relation to each other, and

forming a vertical via for interconnecting a line of said set of lines of the first interconnection level and a line of said set of lines of the second sub-level of the second interconnection level, wherein the via extends past said set of lines of the first sub-level of the second interconnection level in a space between a pair of adjacent lines of said set of lines of the first sub-level of the second interconnection level.