- 专利标题: LIGHT-WEIGHT MECHANISM FOR CHECKING MESSAGE INTEGRITY IN DATA PACKETS
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申请号: EP19156779.1申请日: 2018-11-22
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公开(公告)号: EP3518496A1公开(公告)日: 2019-07-31
- 发明人: Tzeng, Jeffrey , Choudhury, Abhijit K. , Kwentus, Alan Y.
- 申请人: Avago Technologies International Sales Pte. Limited
- 申请人地址: 1 Yishun Avenue 7 Singapore 768923 SG
- 专利权人: Avago Technologies International Sales Pte. Limited
- 当前专利权人: Avago Technologies International Sales Pte. Limited
- 当前专利权人地址: 1 Yishun Avenue 7 Singapore 768923 SG
- 代理机构: Bosch Jehle Patentanwaltsgesellschaft mbH
- 优先权: US201762591618P 20171128; US201816172206 20181026
- 主分类号: H04L29/06
- IPC分类号: H04L29/06
摘要:
This disclosure presents a technique to include a packet sequence number and an integrity check value (ICV) into a data frame while maintaining a total number of transmitted bytes. A transmitting device includes circuitry that generates the ICV, inserts a transmitter packet sequence number into the data frame that includes a data packet including a payload, the data packet following a preamble and an interpacket gap (IPG) following the data packet. The circuitry also inserts the ICV into the data frame, and transmits the data frame, wherein inserting the ICV into the data frame reduces a size of the IPG while maintaining a total number of bytes in the data frame. A receiving device includes circuitry that receives the data frame, compares a receiver packet sequence number to the transmitter packet sequence number, and determines whether the transmitter packet sequence number is valid based on the receiver packet sequence number.
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