- 专利标题: METHOD OF FORMING A DOPED POLYSILICON LAYER
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申请号: EP22203309.4申请日: 2022-10-24
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公开(公告)号: EP4174209A1公开(公告)日: 2023-05-03
- 发明人: VAN AERDE, Steven R. A. , SU, Juan
- 申请人: ASM IP Holding B.V.
- 申请人地址: NL 1322 AP Almere Versterkerstraat 8
- 代理机构: V.O.
- 优先权: US202163272400 P 20211027
- 主分类号: C23C16/24
- IPC分类号: C23C16/24 ; C23C16/455 ; C23C16/56 ; H01L21/02
摘要:
A method and a wafer processing furnace for forming a doped polysilicon layer on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing a plurality of substrates to a process chamber. It also comprises executing a deposition cycle comprising providing a silicon-containing precursor to the process chamber thereby depositing, on the plurality of substrates, an undoped silicon layer until a pre-determined thickness is reached and providing the process chamber with a flow of a dopant precursor gas without providing the silicon-containing precursor to the process chamber. The method also comprises performing a heat treatment process, thereby forming the doped polysilicon layer.
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