The invention patent discloses a computing apparatus triggered by an edge of a supply-line signal with pulse width counter. A computing apparatus triggered by an edge of a supply-line signal with a pulse width counter comprises: a clock circuit to supply clock signals to a pulse width counter from an output port of said clock circuit; said pulse width counter triggered by said clock signals to count the pulse width of a supply-line signal from a power supply line, to set a circuit status of said computing apparatus in accordance with said pulse width, and to output said circuit status to an edge-triggered computing unit; and the edge-triggered computing unit to do computing triggered by an edge of a supply-line signal, and to output computing result as the output of said computing apparatus in accordance with said circuit status. In the invention patent, the circuit status of the computing apparatus is set in accordance with pulse width counter of supply-line signals, and the computing result is output as the output of said computing apparatus in accordance with said circuit status. The problem of no the pulse width of a supply-line signal is solved when a computation is triggered by a supply-line signal.