A display substrate and a display panel. The display substrate comprises: a base substrate, wherein the base substrate comprises a display area (10) and a peripheral area (20), which is located at at least one side of the display area (10). The display area (10) comprises pixel units (11), which are arranged in an array, first gate scanning signal lines (E1-Em) and second gate scanning signal lines (RT1-RTm); and the peripheral area (20) comprises a first scanning drive circuit (21), which is connected to the first gate scanning signal lines (E1-Em) by means of first connecting wirings (30), a second scanning drive circuit (22), which is connected to the second gate scanning signal lines (RT1-RTm) by means of second connecting wirings (40), first voltage signal lines (Evgh), which are configured to provide a first voltage, and second voltage signal lines (GNvgh), which are configured to provide a second voltage, wherein the second scanning drive circuit (22) is located at the side of the first scanning drive circuit (21) that is close to the display area (10). The ratio of a second resistance value to a first resistance value is less than the ratio of the average line width of the second voltage signal lines (GNvgh) to the average line width of the first voltage signal lines (Evgh). By means of the display substrate, a difference in a signal delay time brought about by different resistances of different connecting wirings can be reduced.