Invention Publication
- Patent Title: SEMICONDUCTOR PACKAGE
-
Application No.: EP22845596.0Application Date: 2022-02-21
-
Publication No.: EP4376082A1Publication Date: 2024-05-29
- Inventor: MITARAI, Shun
- Applicant: Sony Semiconductor Solutions Corporation
- Applicant Address: JP Atsugi-shi, Kanagawa 243-0014 4-14-1, Asahi-cho
- Assignee: Sony Semiconductor Solutions Corporation
- Current Assignee: Sony Semiconductor Solutions Corporation
- Current Assignee Address: JP Atsugi-shi, Kanagawa 243-0014 4-14-1, Asahi-cho
- Agency: MFG Patentanwälte Meyer-Wildhagen Meggle-Freund Gerhard PartG mbB
- Priority: JP 2021120185 2021.07.21
- International Application: JP2022006956 2022.02.21
- International Announcement: WO2023002656 2023.01.26
- Main IPC: H01L27/146
- IPC: H01L27/146 ; H01L23/02 ; H01L23/10 ; H01L23/12
Abstract:
Provided is a semiconductor package further reduced in size.
A semiconductor package, including a mounting substrate; a semiconductor chip having a smaller area than the mounting substrate and mounted on a main surface of the mounting substrate; a sealing glass facing the semiconductor chip and the mounting substrate, connected to the mounting substrate by a substrate connection part, and connected to the semiconductor chip by a chip connection part; and a connection wiring layer provided on a first surface of the sealing glass that faces the mounting substrate and the semiconductor chip, and electrically connected to the mounting substrate and the semiconductor chip via the substrate connection part and the chip connection part, wherein the mounting substrate, the semiconductor chip, and the sealing glass have approximately the same thermal expansion coefficient.
A semiconductor package, including a mounting substrate; a semiconductor chip having a smaller area than the mounting substrate and mounted on a main surface of the mounting substrate; a sealing glass facing the semiconductor chip and the mounting substrate, connected to the mounting substrate by a substrate connection part, and connected to the semiconductor chip by a chip connection part; and a connection wiring layer provided on a first surface of the sealing glass that faces the mounting substrate and the semiconductor chip, and electrically connected to the mounting substrate and the semiconductor chip via the substrate connection part and the chip connection part, wherein the mounting substrate, the semiconductor chip, and the sealing glass have approximately the same thermal expansion coefficient.
Information query
IPC分类: