Invention Publication
- Patent Title: SYSTEM AND METHOD FOR CACHE POOLING AND EFFICIENT USAGE AND I/O TRANSFER IN DISAGGREGATED AND MULTI-PROCESSOR ARCHITECTURES VIA PROCESSOR INTERCONNECT
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Application No.: EP21801665.7Application Date: 2021-10-14
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Publication No.: EP4381388A1Publication Date: 2024-06-12
- Inventor: ROOZBEH, Amir , PADALA, Chakri , FARSHIN, Alireza Farshin
- Applicant: Telefonaktiebolaget LM Ericsson (publ)
- Applicant Address: SE 164 83 Stockholm
- Assignee: Telefonaktiebolaget LM Ericsson (publ)
- Current Assignee: Telefonaktiebolaget LM Ericsson (publ)
- Current Assignee Address: SE 164 83 Stockholm
- Agency: Ericsson
- Priority: IN 2111035279 2021.08.05
- International Application: SE2021051016 2021.10.14
- International Announcement: WO2023014252 2023.02.09
- Main IPC: G06F9/50
- IPC: G06F9/50 ; G06F12/084
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