- 专利标题: INTEGRATED CIRCUIT DEVICES COMPRISING BURIED POWER RAILS
-
申请号: EP22216344.6申请日: 2022-12-23
-
公开(公告)号: EP4391033A1公开(公告)日: 2024-06-26
- 发明人: HIBLOT, Gaspard , CHAN, Boon Teik , MIRABELLI, Gioele
- 申请人: Imec VZW
- 申请人地址: BE 3001 Leuven Kapeldreef 75
- 专利权人: Imec VZW
- 当前专利权人: Imec VZW
- 当前专利权人地址: BE 3001 Leuven Kapeldreef 75
- 代理机构: Winger
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L23/528 ; H01L23/535 ; H01L29/775
摘要:
Method for forming an integrated circuit device (98), comprising: a. forming (901) a semiconductor device on a frontside (11) of a substrate (1) comprising: a device layer (2) on the frontside (11) of the substrate (1), the device layer (2) comprising a first active device (20), the substrate (1) comprising: shallow trench isolation structures (139, 131, 132, 133), wherein adjacent shallow trench isolation structures (139, 131, 132, 133) are separated from each other by a separating portion (1391, 1312, 1323) comprising the substrate material (100), a via (130) filled with a sacrificial plug (4) extending through the substrate material (100) in a first separating portion (1312), and wherein the sacrificial plug (4) contacts a source or drain contact (21) of the first active device (20), b. removing (902) the substrate material (100) from a backside of the substrate (1), c. depositing (903) a liner (9) covering the backside (10) of the substrate (1), d. anisotropically etching (904) the liner (9) so as to expose a first end (41) of the sacrificial plug (4), while retaining at least part of the liner (9) in the separating portions (1391, 1312, 1323), e. removing (905) the sacrificial plug (4) selectively with respect to the liner (9), and f. providing (906) an electrically conductive material (30) in the via (130), electrically coupled to a buried power rail (31, 32).
信息查询
IPC分类: