- 专利标题: ANALOG-TO-DIGITAL CONVERTER (ADC) WITH BACKGROUND CALIBRATION
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申请号: EP24151261.5申请日: 2024-01-10
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公开(公告)号: EP4401317A1公开(公告)日: 2024-07-17
- 发明人: BUNCH, Ryan Lee
- 申请人: Qorvo US, Inc.
- 申请人地址: US Greensboro, NC 27409 7628 Thorndike Road
- 专利权人: Qorvo US, Inc.
- 当前专利权人: Qorvo US, Inc.
- 当前专利权人地址: US Greensboro, NC 27409 7628 Thorndike Road
- 代理机构: D Young & Co LLP
- 优先权: US 2363479786P 2023.01.13
- 主分类号: H03M1/10
- IPC分类号: H03M1/10
摘要:
Analog-to-digital converters (ADCs) with background calibration processes are disclosed. In one aspect, an ADC with a plurality of comparators that each compare an input voltage to voltages that are generated at taps across a plurality of references (e.g., a reference resistor ladder). The comparators are initially calibrated with foreground calibration routines and continuously recalibrated to compensate for aging, voltage, and temperature variations without interrupting operation of the ADC by randomly taking one comparator of the plurality of comparators off-line to run calibration processes without replacing that comparator. The value for the off-line comparator may be reliably inferred from values from neighboring comparators or, in some cases, guessed randomly. While possible errors may be introduced, such errors may be driven to a mean square quantization noise level through example aspects of the present disclosure.
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