• Patent Title: ANALOG-TO-DIGITAL CONVERTER (ADC) WITH BACKGROUND CALIBRATION
  • Application No.: EP24151261.5
    Application Date: 2024-01-10
  • Publication No.: EP4401317A1
    Publication Date: 2024-07-17
  • Inventor: BUNCH, Ryan Lee
  • Applicant: Qorvo US, Inc.
  • Applicant Address: US Greensboro, NC 27409 7628 Thorndike Road
  • Assignee: Qorvo US, Inc.
  • Current Assignee: Qorvo US, Inc.
  • Current Assignee Address: US Greensboro, NC 27409 7628 Thorndike Road
  • Agency: D Young & Co LLP
  • Priority: US 2363479786P 2023.01.13
  • Main IPC: H03M1/10
  • IPC: H03M1/10
ANALOG-TO-DIGITAL CONVERTER (ADC) WITH BACKGROUND CALIBRATION
Abstract:
Analog-to-digital converters (ADCs) with background calibration processes are disclosed. In one aspect, an ADC with a plurality of comparators that each compare an input voltage to voltages that are generated at taps across a plurality of references (e.g., a reference resistor ladder). The comparators are initially calibrated with foreground calibration routines and continuously recalibrated to compensate for aging, voltage, and temperature variations without interrupting operation of the ADC by randomly taking one comparator of the plurality of comparators off-line to run calibration processes without replacing that comparator. The value for the off-line comparator may be reliably inferred from values from neighboring comparators or, in some cases, guessed randomly. While possible errors may be introduced, such errors may be driven to a mean square quantization noise level through example aspects of the present disclosure.
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