An integrated circuit device (100) includes a fin-type active region (F1) on a substrate (102), a nanosheet (N1, N2; N3) on a fin top surface of the fin-type active region, the nanosheet being apart from the fin top surface of the fin-type active region in a vertical direction, a gate line (160) surrounding the nanosheet on the fin-type active region, and a source/drain region (130) on the fin-type active region, the source/drain region being in contact with the nanosheet, wherein the nanosheet includes a multilayered sheet comprising a first outer semiconductor sheet (S1), a core semiconductor sheet (S2), and a second outer semiconductor sheet (S3), which are sequentially stacked in the vertical direction.