Invention Patent
- Patent Title: Semiconductor device and its manufacturing method
- Patent Title (中): 半导体器件及其制造方法
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Application No.: JP2006130339Application Date: 2006-05-09
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Publication No.: JP2007305667APublication Date: 2007-11-22
- Inventor: NASU ISATO , USUI TAKAMASA
- Applicant: Toshiba Corp , Toshiba Microelectronics Corp , 東芝マイクロエレクトロニクス株式会社 , 株式会社東芝
- Assignee: Toshiba Corp,Toshiba Microelectronics Corp,東芝マイクロエレクトロニクス株式会社,株式会社東芝
- Current Assignee: Toshiba Corp,Toshiba Microelectronics Corp,東芝マイクロエレクトロニクス株式会社,株式会社東芝
- Priority: JP2006130339 2006-05-09
- Main IPC: H01L21/60
- IPC: H01L21/60
Abstract:
PROBLEM TO BE SOLVED: To reduce manufacturing time and manufacturing cost, and to suppress a drop of yield and reliability in a semiconductor device wherein a semiconductor chip and a lamination body are connected. SOLUTION: The semiconductor device is provided with a semiconductor chip 10 having a first pad 13, a lamination body 20 having a second pad 23 facing the first pad 13, and high melting-point metallic layers 15 and 25 which are directly in contact with the first and second pads 13 and 23, respectively, and are formed by the electroless plating method. COPYRIGHT: (C)2008,JPO&INPIT
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