发明专利
JPS61103254A Evaluation system for software performance 失效
软件性能评估系统

Evaluation system for software performance
摘要:
PURPOSE:To evaluate the software performance easily and quickly without losing real time properties by obtaining periodically the program counter information on a program which is under execution and collating the obtained counter information with a software memory map. CONSTITUTION:The fetching cycle of the address information to an arithmetic controller 2A corresponds to the clock cycle of a clock generator 2D whose cycle is varied optionally. The controller 2A is started periodically with the clock given from the generator 2D. Thus address information is fetched by the controller 2A from an input register 2C and collated with a memory map 2E. If it is known from said collation that the address is within a range, the passing frequency is set to the relevant address within a memory 2 in a replaceable form. Therefore, the information on the memory 2F is outputted and displayed by a display device serving as a performance evaluation information output device 2G in the form of the result of evaluation of the software performance.
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