形成耐压区，从而包围所述逻辑电路形成区域，对于某些电平移位电压区域中的高电压MOSFET（71，72）形成，并且所述高电压MOSFET的漏极区域（71，72） 形成逻辑电路形成区域，所述屏蔽层（300之间的p开口区域（131）到上连接到所述逻辑电路形成区域的电源的负电极侧上的对 - 开口面积（131）连接 ）的地方。 因此，能够提供具有在切换时的电平移位电路能够稳定操作和高耐压IC的长期可靠性高击穿电压的半导体器件。

Is formed withstand voltage region so as to surround the logic circuit formation region, the high voltage MOSFET for some level shift voltage region (71, 72) is formed, and a drain region of the high voltage MOSFET (71, 72) forming an opening region (131), the ^p - - p between the logic circuit forming region shield layer connected to the negative electrode side of the power supply connected to the logic circuit forming region on the opening area (131) (300 ) to place. Thus, it is possible to provide a high breakdown voltage semiconductor device having a level shift circuit capable of stable operation at the switching time and long-term reliability of the high voltage the IC.