Thin film transistor array panel, liquid crystal display and manufacturing method thereof
Abstract:
A thin-film transistor array panel includes a gate line disposed on a first substrate, the gate line including a gate electrode, a semiconductor layer disposed on the first substrate, the semiconductor layer including an oxide semiconductor, a data wire layer disposed on the first substrate, the data wire layer including a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, a capping layer disposed on the data wire layer, a tilt layer disposed on the capping layer, and a passivation layer disposed on the tilt layer, in which the tilt layer includes a silsesquioxane-based copolymer.
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