The present disclosure provides an array substrate, including: a plurality of gate lines and a plurality of data lines intersecting with one another for defining a plurality of pixel regions, each pixel region including two pixel units, each pixel unit including a pixel electrode; and a common electrode line and a pixel electrode line, the pixel electrode line being electrically connected to the pixel electrode. The common electrode line and at least one pixel electrode line form at least an overlapping area for forming at least one storing capacitor there-between.