Semiconductor chips including redistribution interconnections and related semiconductor packages
Abstract:
A semiconductor chip is provided including an integrated circuit on a substrate; pads electrically connected to the integrated circuit; a lower insulating structure defining contact holes exposing the pads, respectively; and first, second and third conductive patterns electrically connected to the pads. The second conductive pattern is between the first conductive pattern and the third conductive pattern when viewed from a plan view. Each of the first to third conductive patterns includes a contact portion filling the contact hole, a first conductive line portion extending in one direction on the lower insulating structure, and a bonding pad portion. Ends of the bonding pad portions of the first and third conductive patterns protrude in the one direction as compared with an end of the bonding pad portion of the second conductive pattern when viewed from a plan view.
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