A semiconductor device according to an embodiment includes first and second memory cells, a first word line, and first and second bit lines. The first memory cell has a first gate electrode and a first channel. The second memory cell has a second gate electrode and a second channel. The first word line connected with each of the first and second gate electrodes. The first and second bit lines electrically connected with the first and second channels, respectively. The semiconductor device erases data of each of the first and second memory cells, and then shifts respective threshold voltages of the first and second memory cells while making a first voltage between the first gate electrode and the first channel, and a second voltage between the second gate electrode and the second channel. The first voltage is different from the second voltage.