A method of manufacturing a flash memory includes providing a substrate, a memory gate on the substrate, a hard mask on the memory gate, a spacer on a sidewall of the memory gate, and a select gate disposed on a sidewall of the spacer. A first silicon oxide layer is formed to conformally cover the memory gate, the hard mask, the spacer, and the select gate. A thickness of the first silicon oxide layer is smaller than 0.54 of a thickness of the hard mask. Later, the first silicon oxide layer is thinned by a dry etching process. After that, the first silicon oxide layer and the hard mask are entirely removed by a wet etching process.