Technologies are generally described for systems, devices and methods effective to select program instructions for a hardware finite automaton on a multi-core processor that includes two or more cores. A hardware finite automata manager may identify executable instructions associated with a particular one of the cores of the multi-core processor. The hardware finite automata manager may determine that the hardware finite automaton is available to be used. The hardware finite automata manager, in response to the determination that the hardware finite automaton is available, may select at least one program instruction based on the executable instructions. The at least one program instruction may be configured to modify the hardware finite automaton to pre-fetch data. The hardware finite automaton manager may transmit the at least one program instruction to the hardware finite automaton.