Invention Grant
- Patent Title: Systems and methods for error detection and correction
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Application No.: US15388901Application Date: 2016-12-22
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Publication No.: US10069596B1Publication Date: 2018-09-04
- Inventor: David P. Chengson , Granthana Kattehalli Rangaswamy , David James Ofelt , Edward C. Priest , Bhavesh Patel
- Applicant: Juniper Networks, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Juniper Networks, Inc.
- Current Assignee: Juniper Networks, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Shumaker & Sieffert, P.A.
- Main IPC: H04L1/00
- IPC: H04L1/00 ; H04L1/24 ; H04L27/06

Abstract:
In an example of this disclosure, a method may include receiving, by a bit error location analyzer, a split information signal at a second data rate derived from an information signal at a first data rate. In this example, the second data rate is less than the first data rate, and the bit error location analyzer may be incapable of performing error analysis at the first data rate The method may include performing error analysis, by the bit error location analyzer, on information represented by the split information signal. In some examples, performing error analysis may include comparing the information represented by the split information signal to an information seed to determine a plurality of bit error locations in the information represented by the split information signal relative to the information seed.
Information query